3-way transistor and uneven logic
Lets think about this: a 3 way transistor and uneven logic. So we have, logically speaking: a&b&c with three possible values (0,1,2): 0&0&0=0 0&0&1=0 0&0&2=0 0&1&0=0 0&1&1=1 0&1&2=0 0&2&0=0 0&2&1=0 0&2&2=2 1&0&0=0 1&0&1=1 1&0&2=0 1&1&0=1 1&1&1=1 1&1&2=1 1&2&0=0 1&2&1=1 1&2&2=2 2&0&0=0 2&0&1=0 2&0&2=2 2&1&0=0 2&1&1=1 2&1&2=2 2&2&0=2 2&2&1=2 2&2&2=2 Right? Let's update with the rest: Updating on the 4 bit propositional logic, Which should be 3 way or 2nd order uneven logic (since 1=1 is 1st order): As in: What if there were 3 true/false/X values? Now for or denoted by | (inclusive): 0|0|0=0 0|0|1=1 0|1|0=1 0|1|1=1 1|0|0=1 1|0|1=1 1|0|2=2 1|1|0=1 1|1|1=1 1|1|2=1 - 0|0|2=2 0|1|2=2 0|2|0=2 0|2|1=2 2|0|0=2 2|0|1=2 2|1|0=2 2|1|1=2 2|1|2=2 2|2|2=2 Let's denote exclu...